CTS-Bench: New Benchmark for Evaluating Graph Neural Networks in Chip Clock Tree Design
Researchers have introduced CTS-Bench, a benchmark suite evaluating how graph coarsening techniques affect Graph Neural Network performance in Clock Tree Synthesis tasks for electronic chip design. The benchmark comprises 4,860 physical design solutions and shows that while graph coarsening can reduce GPU memory usage by up to 17.2x and speed up training by up to 3x, it frequently destroys structural information critical for accurate clock skew prediction. The findings matter because they expose a fundamental limitation in applying generic graph simplification methods to specialized hardware design tasks, potentially guiding better GNN deployment in Electronic Design Automation.
CTS-Bench is a newly proposed benchmark suite designed to systematically assess the trade-offs between computational efficiency and prediction accuracy when Graph Neural Networks (GNNs) are applied to Clock Tree Synthesis (CTS) analysis in Electronic Design Automation. The benchmark includes 4,860 converged physical design solutions spanning five chip architectures, providing both raw gate-level and clustered graph representations derived from post-placement designs. Using clock skew prediction as a representative task, the study finds that graph coarsening — a common technique for making large graphs computationally tractable — can reduce GPU memory consumption by up to 17.2x and accelerate training by up to 3x. However, these efficiency gains come at a steep cost: generic graph clustering methods frequently yield negative R² scores under zero-shot evaluation, indicating that they remove structural information essential for modeling clock distribution behavior. Critically, these accuracy failures can occur even when global physical metrics of the design appear unchanged, making the degradation non-obvious without targeted benchmarking. The authors argue that CTS-Bench provides a principled foundation for developing CTS-aware coarsening strategies and evaluating GNN architectures under realistic physical design constraints. The work has been accepted to the ML Bench'26 workshop at ASPLOS.
What's missing
The paper does not report results from CTS-aware or task-specific graph coarsening methods as baselines — it primarily demonstrates the failure of generic approaches, leaving open how much of the accuracy gap could be recovered with tailored coarsening. Additionally, the benchmark currently uses clock skew prediction as the sole representative CTS task; generalizability to other CTS objectives such as insertion delay or power is not evaluated.
What different sources said
- arXiv cs.LGCenter
CTS-Bench: Benchmarking Graph Coarsening Trade-offs for GNNs in Clock Tree Synthesis
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