CTS-Bench: New Benchmark for Evaluating Graph Neural Networks in Chip Clock Tree Design
Researchers introduced CTS-Bench, a benchmark suite for evaluating how graph coarsening—a technique to reduce computational demands—affects Graph Neural Networks (GNNs) used in Electronic Design Automation for clock tree synthesis. The benchmark reveals a significant trade-off: while coarsening reduces GPU memory usage by up to 17.2x and speeds up training by 3x, it often removes critical structural information needed for accurate clock skew prediction. This work provides a foundation for developing more efficient GNN-based tools for chip design optimization.
Researchers at arXiv have introduced CTS-Bench, a comprehensive benchmark suite designed to systematically evaluate the trade-offs between graph coarsening, prediction accuracy, and computational efficiency in GNN-based Clock Tree Synthesis (CTS) analysis. The benchmark comprises 4,860 converged physical design solutions across five architectures, with paired representations of both raw gate-level and clustered graphs from post-placement designs. Using clock skew prediction as a representative CTS task, the study demonstrates a clear accuracy-efficiency trade-off: while graph coarsening substantially reduces computational costs (up to 17.2x reduction in GPU memory and 3x faster training), it frequently compromises prediction accuracy by removing structural information essential for modeling clock distribution, often resulting in negative R² scores under zero-shot evaluation. The findings indicate that generic graph clustering techniques can fundamentally undermine CTS learning objectives even when global physical metrics remain unchanged. CTS-Bench enables principled evaluation of CTS-aware graph coarsening strategies and supports benchmarking of GNN architectures under realistic physical design constraints, providing a foundation for developing more effective learning-assisted CTS analysis and optimization techniques.
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- arXiv cs.LGCenter
CTS-Bench: Benchmarking Graph Coarsening Trade-offs for GNNs in Clock Tree Synthesis
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